[DTrace-devel] [PATCH v2 2/3] Delay setting %r1 to reduce reg overwrite

[Kris Van Hees]

On Sun, Jan 21, 2024 at 01:35:33AM -0500, eugene.loh at oracle.com wrote:
> 
> Register management is currently a little risky.  In this case,
> we set %r1 first even though theoretically that could overwrite
> some value.  We might as well delay setting %r1 since its value
> depends on no other registers.
> 
> Signed-off-by: Eugene Loh <eugene.loh at oracle.com>

Reviewed-by: Kris Van Hees <kris.van.hees at oracle.com>

> ---
>  libdtrace/dt_cg.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/libdtrace/dt_cg.c b/libdtrace/dt_cg.c
> index ec963b43..dad5ab58 100644
> --- a/libdtrace/dt_cg.c
> +++ b/libdtrace/dt_cg.c
> @@ -5249,7 +5249,6 @@ dt_cg_subr_arg_to_tstring(dt_node_t *dnp, dt_irlist_t *dlp, dt_regset_t *drp,
>  	if (dt_regset_xalloc_args(drp) == -1)
>  		longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
>  
> -	dt_cg_access_dctx(BPF_REG_1, dlp, drp, -1);
>  	emit(dlp, BPF_MOV_REG(BPF_REG_2, arg->dn_reg));
>  	dt_regset_free(drp, arg->dn_reg);
>  	if (dt_node_is_string(arg))
> @@ -5267,6 +5266,8 @@ dt_cg_subr_arg_to_tstring(dt_node_t *dnp, dt_irlist_t *dlp, dt_regset_t *drp,
>  	else if (isreg5 == DT_ISIMM)
>  		emit(dlp, BPF_MOV_IMM(BPF_REG_5, val5));
>  
> +	dt_cg_access_dctx(BPF_REG_1, dlp, drp, -1);
> +
>  	idp = dt_dlib_get_func(yypcb->pcb_hdl, fname);
>  	assert(idp != NULL);
>  	dt_regset_xalloc(drp, BPF_REG_0);
> -- 
> 2.18.4
> 
>