[DTrace-devel] [PATCH 3/7 v2] Add support for indexed built-in variables lookup

[Kris Van Hees]

Signed-off-by: Kris Van Hees <kris.van.hees at oracle.com>
---
 bpf/get_bvar.c     | 7 ++++++-
 libdtrace/dt_cg.c  | 1 +
 libdtrace/dt_dis.c | 9 +++++----
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/bpf/get_bvar.c b/bpf/get_bvar.c
index 0da4b35a..4ff9b695 100644
--- a/bpf/get_bvar.c
+++ b/bpf/get_bvar.c
@@ -33,7 +33,7 @@ extern uint64_t BOOTTM;
 		-1; \
 	})
 
-noinline uint64_t dt_get_bvar(const dt_dctx_t *dctx, uint32_t id)
+noinline uint64_t dt_get_bvar(const dt_dctx_t *dctx, uint32_t id, uint32_t idx)
 {
 	dt_mstate_t	*mst = dctx->mst;
 
@@ -54,6 +54,11 @@ noinline uint64_t dt_get_bvar(const dt_dctx_t *dctx, uint32_t id)
 	case DIF_VAR_ARG6: case DIF_VAR_ARG7: case DIF_VAR_ARG8:
 	case DIF_VAR_ARG9:
 		return mst->argv[id - DIF_VAR_ARG0];
+	case DIF_VAR_ARGS:
+		if (idx >= sizeof(mst->argv) / sizeof(mst->argv[0]))
+			return error(dctx, DTRACEFLT_ILLOP, 0);
+
+		return mst->argv[idx];
 	case DIF_VAR_STACKDEPTH:
 	case DIF_VAR_USTACKDEPTH: {
 		uint32_t bufsiz = (uint32_t) (uint64_t) (&STKSIZ);
diff --git a/libdtrace/dt_cg.c b/libdtrace/dt_cg.c
index 50afa413..7d15849d 100644
--- a/libdtrace/dt_cg.c
+++ b/libdtrace/dt_cg.c
@@ -2232,6 +2232,7 @@ dt_cg_load_var(dt_node_t *dst, dt_irlist_t *dlp, dt_regset_t *drp)
 
 	emit(dlp, BPF_LOAD(BPF_DW, BPF_REG_1, BPF_REG_FP, DT_STK_DCTX));
 	emit(dlp, BPF_MOV_IMM(BPF_REG_2, idp->di_id));
+	emit(dlp, BPF_MOV_IMM(BPF_REG_3, 0));
 	idp = dt_dlib_get_func(yypcb->pcb_hdl, "dt_get_bvar");
 	assert(idp != NULL);
 	dt_regset_xalloc(drp, BPF_REG_0);
diff --git a/libdtrace/dt_dis.c b/libdtrace/dt_dis.c
index 58c02fd5..75438985 100644
--- a/libdtrace/dt_dis.c
+++ b/libdtrace/dt_dis.c
@@ -346,11 +346,12 @@ dt_dis_bpf_args(const dtrace_difo_t *dp, const char *fn,
 {
 	if (strcmp(fn, "dt_get_bvar") == 0) {
 		/*
-		 * We know that the previous instruction exists and moves
-		 * the variable id to a register (because we wrote the code
-		 * generator to emit the instructions in this exact order.)
+		 * We know that the previous two instructions exist and move
+		 * the variable id to a register in the first instruction of
+		 * that sequence (because we wrote the code generator to emit
+		 * the instructions in this exact order.)
 		 */
-		in--;
+		in -= 2;
 		snprintf(buf, len, "%s",
 			 dt_dis_varname_id(dp, in->imm, DIFV_SCOPE_GLOBAL, addr));
 		return buf;
-- 
2.34.1